HI-6010

GENERAL DESCRIPTION

The HI-6010 is a CMOS integrated circuit designed to  interface the avionics data bus standard ARINC 429 to an  8 bit port. It contains one receiver and one transmitter.  They operate independently except for the self test option  and the parity option. The receiver demands that the  incoming data meet the standard protocol and the  transmitter outputs a standard protocol stream. The HI-6010 provides flexible options for interfacing to the  user system. The controlling processor can operate both  the receiver and transmitter either by using hard wired  flags and gates at the pins or by using software reads and  writes of the Status Register and Control Register or a  combination thereof. The chip is programmable to operate with single 8 bit  bytes requiring "on the fly transmitter loading and receiver  downloading" or to operate in 32 bit "extended buffer"  mode. In addition there is an option to use automatic label  recognition after loading 8 possible labels for comparison.  Parity and self test are also software programmable.  Master Reset is activated only by taking the MR pin high. Two clock inputs allow independent selection of the data  rates of the transmitter and receiver. Each must be 4X the  desired ARINC 429 frequency. Error flags are generated for transmitter underwrites and  for receiver data framing miscues, parity errors, and buffer  overwrites. The HI-6010 is a 5 volt chip that will require data translation from and to the ARINC bus. The HI-8482 and HI-8588  line receivers are available for the receiver side and the  HI-318X and HI-858X line drivers are available for the  transmitter side.

FEATURES

ARINC 429 protocol controller with interface to  an 8 bit bus 

Automatic label recognition option

 8 bit or 32 bit buffering option 

Self test and parity options 

CMOS / TTL logic pins 

 Plastic and ceramic package options - surface mount or DIP 

 Military processing available